Synchronous rectification replaces much of a rectifier diode’s forward drop with the lower channel resistance of a MOSFET. The efficiency benefit depends on timing. The MOSFET must turn on after current has commutated into the correct direction and turn off before the secondary voltage reverses. The interval between commands is dead time, and both excessive and insufficient dead time carry a penalty.
Understand the two failure directions
With excessive dead time, current flows through the MOSFET body diode or reverse-conduction path for longer than necessary. The higher voltage drop increases loss and temperature. With insufficient dead time, the synchronous MOSFET can conduct reverse current or overlap with another switching state, causing current spikes and potentially destructive shoot-through.
The optimum is not a single theoretical number. Propagation delay, gate threshold, drive strength, device charge, leakage inductance, load current, and temperature all shift the real switching instant.
Measure the commutation sequence
Capture the synchronous MOSFET gate-to-source voltage, drain-to-source voltage, and secondary current. Look for the interval where current has transferred to the diode before the channel turns on, then observe when the channel turns off relative to current reversal. Use probes and references that can tolerate the common-mode transition without adding a large loop.
- At heavy load, conduction loss often dominates and shorter diode intervals are attractive.
- At light load, current can reverse earlier and timing must prevent negative energy transfer.
- At startup or burst-mode transitions, the waveform may not resemble steady state.
- At high temperature, on-resistance, threshold, and propagation delays change.
Select the MOSFET with timing in mind
Low on-resistance reduces channel conduction loss, but a larger device can carry more gate charge and output capacitance. That may increase driver loss and slow the timing edges. Body-diode forward voltage and reverse-recovery behavior matter during each dead-time interval. Compare the complete loss contribution at the actual RMS current and switching frequency.
Gate resistance can shape the transition and suppress ringing, but it also changes effective delay. If turn-on and turn-off need different behavior, use separate paths. Keep the driver return close to the source connection so common-source inductance does not distort the commanded timing.
Use adaptive timing carefully
Many controllers detect drain voltage or current polarity to adapt synchronous timing. Adaptive control can reduce loss across a wide load range, but it still depends on sensing thresholds, blanking time, parasitic ringing, and minimum on or off times. Verify behavior when the sensed waveform is noisy and during mode changes.
Validate the efficiency result
- Establish a conservative timing baseline with no overlap.
- Reduce dead time in controlled steps while monitoring current spikes and diode interval.
- Measure input power, output power, and MOSFET temperature at each step.
- Repeat across line, load, temperature, and operating modes.
- Restore margin for propagation-delay tolerance and component variation.
The best setting is a timing window with margin, not the narrow point that produces the highest bench efficiency. A repeatable waveform across the full operating range is worth more than a fraction of a percent measured at one nominal condition.
Technical reference: Infineon, MOSFET device selection for synchronous rectification.
