Why MOSFET Coss Matters in an LLC Resonant Converter

Zero-voltage switching is a central benefit of the LLC resonant converter. During dead time, resonant current charges the output capacitance of one primary MOSFET and discharges the other, moving the half-bridge node to the next rail before turn-on. Whether that transition completes depends on current, dead time, and the devices’ nonlinear output-capacitance behavior.

Coss is not a fixed capacitor

The capacitance measured at the drain varies strongly with drain voltage. The single Coss value listed in a table is typically measured at a defined voltage and frequency. Multiplying that number by bus voltage may not reproduce the actual charge, transition time, or stored energy across the full voltage swing.

Datasheets may provide output charge Qoss, stored energy Eoss, time-related effective capacitance Co(tr), and energy-related effective capacitance Co(er). Each compresses nonlinear behavior into a form suited to a particular calculation.

Match the parameter to the question

• Use output charge or time-related effective capacitance when estimating how long a known current needs to move the switch node.
• Use stored energy or energy-related effective capacitance when estimating energy that must be exchanged or dissipated.
• Use the full curves when comparing devices across a different bus-voltage range.
• Include package, transformer, heatsink, and PCB capacitance connected to the switching node.

The effective capacitance of both half-bridge devices participates in the transition. Transformer interwinding capacitance and any intentional snubber or shaping capacitor add to the required charge. Parasitic capacitance to chassis may also increase common-mode current even when it does not appear in the simplified resonant model.

Find the difficult ZVS condition

At light load, resonant current may be too small to complete the transition within dead time. At high line, more charge may need to move. Operating frequency and magnetizing current change with control state. Device capacitance can vary with temperature and production spread. The worst case is therefore found by sweeping the operating map, not by checking nominal full load alone.

If dead time is too short, the MOSFET turns on with residual drain voltage and incurs capacitive turn-on loss. If dead time is too long, reverse conduction increases and the switch node may ring or move away from the desired rail. The selected dead time must provide a stable window across all conditions.

Compare devices as a loss system

A lower on-resistance device may have a larger die and greater output charge. It can reduce conduction loss while making light-load ZVS more difficult. Gate charge, reverse-recovery behavior, reverse-conduction drop, and package inductance also influence the result. Device ranking should use measured converter efficiency and waveforms at representative operating points.

Validate on the production power stage

1. Measure half-bridge voltage and gate command during dead time.
2. Confirm the drain voltage reaches the target rail before gate turn-on.
3. Repeat at high line, low line, light load, full load, burst entry, and hot operation.
4. Compare temperature and efficiency while adjusting dead time.
5. Include the production transformer, heatsink, and EMI components.

In an LLC design, output capacitance is part of the resonant transition. Selecting the right datasheet representation and validating it against real waveforms prevents optimistic ZVS estimates and supports a better balance of light-load and full-load performance.

Technical reference: Infineon, Primary-side MOSFET selection for LLC topology.