Fast drain-voltage transitions in a SiC half bridge couple displacement current through the off-state device’s gate-drain capacitance. If the gate loop cannot sink that current with low impedance, the gate voltage rises. A sufficiently large excursion can produce parasitic turn-on, extra loss, or cross-conduction. Negative turn-off bias increases the noise margin, but it also adds supply complexity and can increase negative gate stress. The decision should be based on measured behavior and the specific device requirements.
Start with the false-turn-on mechanism
During the opposite switch’s transition, current through the Miller capacitance flows into the off-state gate network. The resulting gate-voltage rise depends on drain dv/dt, transfer capacitance, driver sink impedance, common-source inductance, and loop geometry. Source inductance shared by the power path and driver return is especially harmful because a fast current change moves the apparent source potential seen by the driver.
Negative bias is only one control. A Kelvin-source return, close driver placement, strong sink current, separate turn-off resistance, and an active Miller clamp can reduce the same risk without moving the steady-state gate voltage as far below zero.
Decide from operating conditions
Single-ended converters with controlled edge rates may operate reliably with a zero-volt turn-off command. A high-power half bridge with large dv/dt, substantial common-source inductance, or demanding short-circuit behavior may benefit from negative bias. Evaluate the worst case at high bus voltage, hot device temperature, maximum opposing-switch speed, and the production layout.
- Measure gate-to-source voltage directly at the device pins or Kelvin terminals.
- Use a probe with low loop inductance and sufficient common-mode performance.
- Check both positive Miller bump and negative undershoot.
- Include driver supply tolerances and transformer regulation if the bias is isolated.
- Review the device manufacturer’s recommended on and off voltages.
Implement the bias as a controlled rail
An isolated bipolar supply can provide separate positive and negative rails. Other approaches shift a single isolated rail with a Zener network or use a dedicated isolated gate-drive supply. Whichever method is used, consider startup and shutdown sequencing. The gate must remain in a known off state while the isolated supply rises, falls, or experiences a brownout.
Place local decoupling between the driver rails at the driver pins. Minimize the loop from driver output to gate and back through the Kelvin source. If separate turn-on and turn-off resistors are fitted, select the turn-off path to sink Miller current without producing excessive negative ringing. A clamp diode may be useful, but its parasitic inductance and dynamic behavior must be included in the layout.
Verify more than a clean gate trace
Correlate gate voltage with switch-node voltage, drain current, and device temperature. Confirm that negative bias does not create excessive reverse-conduction loss during dead time for the chosen topology. Exercise abnormal states such as missing PWM, driver undervoltage, desaturation or short-circuit trip, and rapid power cycling.
The appropriate negative rail is the smallest magnitude that provides stable turn-off margin across the validated operating envelope. That value may differ between device families, so carry the decision and its waveform evidence into any second-source qualification.
Technical reference: Wolfspeed, Gate Drivers and Gate Driving with SiC MOSFETs.
